Protocol acceleration board boosts performance

Adax has launched the SDCIII AMC, a protocol acceleration board designed to enhance IP network performance by offering packet processing, IP security and signaling capabilities. The SDCIII is able to reduce the processing burden placed on the network by offering computationally intensive functions such as SCTP packet processing, IPsec and SIP parsing. This capability relieves the CPU of some of the largest application overheads and makes the SDCIII suitable for deployment in IMS and Next Gen 3GPP wireless IP networks.

'IP signaling applications can help to lower operational expenditure, but they are already having a major impact on SCTP and SIP performance', explains Robin Kent, Director of Operations at Adax Europe.

'System architects need to iron out potential bottlenecks now in anticipation of greater IP traffic volumes because a failure to do so will result in availability issues further down the line'.

Its dedicated hardware enables the SDCIII to perform core functions to reduce impact on the CPU.

This includes the checksum of inbound and outbound SCTP PDUs, which can account for up to 30% of the protocol overhead.

The SDCIII facilitates IPsec through an integrated security engine, designed to offload the security functions key to IMS, such as key generation and exchange, authentication and bulk encryption.

'The inclusion of the security engine on the SDCIII is in response to the growing importance of IMS', explains Kent.

'While responsibility for security in the home network lies with the individual operator, the control point between the IMS 'home network' and 'visited network' must use IPsec in the Security Gateway'.

'As more operators adopt IMS, it's inevitable that they will look for solutions like the SDCIII to run IPsec without compromising overall performance'.

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